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HD74LS12 - Triple 3-input Positive NAND Gates(with Open Collector Outputs)

HD74LS12_19103.PDF Datasheet

 
Part No. HD74LS12
Description Triple 3-input Positive NAND Gates(with Open Collector Outputs)

File Size 44.26K  /  5 Page  

Maker


HITACHI[Hitachi Semiconductor]



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Part: HD74LS12
Maker: HITACHI
Pack: SOP 5.2MM
Stock: 722
Unit price for :
    50: $0.13
  100: $0.13
1000: $0.12

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 Full text search : Triple 3-input Positive NAND Gates(with Open Collector Outputs)


 Related Part Number
PART Description Maker
HM62256B HM62256BLP-7 HM62256BLSP-7SL HM62256BLP-7 Triple 3-Input Positive-NAND Gates 20-LCCC -55 to 125
256k SRAM (32-kword x 8-bit)
Triple 3-Input Positive-AND Gates 14-CDIP -55 to 125
Triple 3-Input Positive-NAND Gates 14-CDIP -55 to 125
Triple 3-Input Positive-AND Gates 14-CFP -55 to 125
Triple 3-Input Positive-AND Gates 20-LCCC -55 to 125
STANDARD SRAM, PDSO32
STANDARD SRAM, PDSO28
Hitachi,Ltd.
AAT3562IGY-320-T1 AAT3562IGY-420-T1 AAT3564IGY-420 Triple 3-input positive-AND gates 14-PDIP 0 to 70
CONNECTOR ACCESSORY
Triple 3-input positive-AND gates 14-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-PDIP 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70
Triple 3-input positive-NAND gates 14-SO 0 to 70
Triple 3-input positive-AND gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP 0 to 70
Dual J-K Flip-Flops With Clear 14-SO 0 to 70
NanoPower Voltage Detector NanoPower电压检测器
Dual J-K Flip-Flops With Clear 14-SOIC 0 to 70 NanoPower电压检测器
Dual J-K Flip-Flops With Clear 14-PDIP 0 to 70 NanoPower电压检测器
Advanced Analogic Technologies, Inc.
74F10 74F11 N74F11N N74F10D N74F10N N74F11D 74F10_ Triple 3-input NAND gate; Triple 3-input AND gate F/FAST SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14
From old datasheet system
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
M28F201 M28F201-120K6R M28F201-120XK6R M28F201-120 Triple 3-Input Positive-NOR Gates 14-SOIC 0 to 70
Triple 3-Input Positive-NOR Gates 14-PDIP 0 to 70
9-Bit Parity Generators/Checkers 14-SOIC 0 to 70
Quadruple 2-Input Multiplexers With Storage 16-PDIP 0 to 70
8-Input Positive-NAND Gates 14-SSOP 0 to 70
9-Bit Parity Generators/Checkers 14-PDIP 0 to 70 2 MB56K × 8,芯片擦除闪
9-Bit Parity Generators/Checkers 14-SO 0 to 70 2 MB56K × 8,芯片擦除闪
2 Mb 256K x 8, Chip Erase FLASH MEMORY 2 MB56K × 8,芯片擦除闪
8-Input Positive-NAND Gates 14-SO 0 to 70 2 MB56K × 8,芯片擦除闪
9-Bit Parity Generators/Checkers With Bus-Driver Parity I/O Ports 14-SOIC 0 to 70 2 MB56K × 8,芯片擦除闪
2 Mb 256K x 8/ Chip Erase FLASH MEMORY
2 Mb 256K x 8, Chip Erase FLASH MEMORY 2 MB256K × 8,芯片擦除闪
8-Input Positive-NAND Gates 14-SOIC 0 to 70 2 MB256K × 8,芯片擦除闪
意法半导
STMicroelectronics N.V.
74ACT11010DR 74ACT11010N <font color=red>[Old version datasheet]</font> TRIPLE 3-INPUT POSITIVE-NAND GATES
TI store
74ABT10PWDH 74ABT10 74ABT10D 74ABT10DB 74ABT10N 74 Triple 3-input NAND gate ABT SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
DM54L10J/883C DM54L10W/883C DM54L10J/883B Triple 3-input NAND Gate 3输入与非
Triple 3-input NAND Gate 输入与非
Delta Electronics, Inc.
AIC1730 AIC1730-18CQ AIC1730-18CV AIC1730-19CQ AIC Hex Schmitt-Trigger Inverters 14-SOIC 0 to 70 低噪声低压差50mA的线性稳压器
Dual 4-input positive-NAND gates 14-PDIP 0 to 70 低噪声低压差50mA的线性稳压器
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Dual 4-input positive-NAND gates 14-SOIC 0 to 70 低噪声低压差50mA的线性稳压器
Analog Integrations, Corp.
AIC[Analog Intergrations Corporation]
Analog Integrations Corporation
74LV10 74LV10D 74LV10DB 74LV10PWDH 74LV10N 74LV10P Triple 3-input NAND gate
Triple 3-inpt NAND gate
NXP Semiconductors
PHILIPS[Philips Semiconductors]
M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
 
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